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[Other resource] Pseudo-random-code

Description: 基于FPGA实现的伪随机序列快速同步.rar
Platform: | Size: 185250 | Author: 双方都 | Hits:

[File Format] designforvideobasedonSDRAM

Description: 在信息处理中，特别是实时视频图像处理中，通常都要对实现视频图像进行处理，而这首先必须设计大容量的存储器，同步动态随机存储器SDRAM虽然有价格低廉、容量大等优点，但因SDRAM的控制结构复杂，常用的方法是设计SDRAM通用控制器，这使得很多人不得不放弃使用SDRAM而使用价格昂贵的SRAM。为此，笔者在研究有关文献的基础上，根据具体情况提出一种独特的方法，实现了对SDRAM的控制，并通过利用FPGA控制数据存取的顺序来实现对数字视频图像的旋转，截取、平移等实时处理。-In information processing, especially real-time video image processing usually have to deal with video images, which must first be designed large-capacity memory, synchronous dynamic random access memory SDRAM Although there are low cost, large capacity, etc., but SDRAM control structure of the complex, commonly used method is to design generic SDRAM controller, which makes a lot of people had to abandon the use of SDRAM and the use of expensive SRAM. To this end, the authors examine the literature based on the specific situation in a unique way to realize the control of SDRAM, and control data through the use of FPGA to realize the order of access to digital video image rotation, interception, translation, such as real-time processing.
Platform: | Size: 137216 | Author: 赵明玺 | Hits:

[VHDL-FPGA-Verilog] Pseudo-random-code

Description: 基于FPGA实现的伪随机序列快速同步.rar-FPGA-based pseudo-random sequence to achieve fast synchronization. Rar
Platform: | Size: 185344 | Author: | Hits:

[Program doc] Simple_Digital_FPGA_Pseudo-Chaos_Generator

Description: In this paper, the feasibility of replacing a chaos source by an equivalent digital pseudo-random generator realized using Linear Feedback Shift Register (LFSR) is studied. Particular emphasis is given on the digital implementation Piece-Wise Linear Affine Maps (PWAM). As an application, an FPGA implementation of four different maps has been experimentally verified in a FM-DCSK test radio system.
Platform: | Size: 257024 | Author: gsbnd | Hits:

[Crack Hack] khalil2006_true_random_number_generator

Description: a true random number generator (TRNG) in hardware which is targeted for FPGA-based crypto embedded systems. All crypto protocols require the generation and use of secret values that must be unknown to attackers.Random number generators (RNG) are required to generate public/private key pairs for asymmetric algorithm such as RSA and symmetric algorithm such as AES.
Platform: | Size: 418816 | Author: Hassan Abdelaziz | Hits:

[Other] digitaloscilloscope

Description: This digital oscilloscope takes a MCU and FPGA as the core. We made emphases on the choice of the sampling methods and the implement of equivalent sampling as a result, our design not only has the real-time sampling mode but also can reach the highest equivalent sample rate of 200 MHz using the real-time sample rate of 1 MHz, by way of random equivalent sampling. At the same time, this system has many other functions, such as 2 mV small-signal measuring, storage and re-display of waveform, measuring frequency, selective trigger edge, output of the correction signal and so on.-This digital oscilloscope takes a MCU and FPGA as the core. We made emphases on the choice of the sampling methods and the implement of equivalent sampling as a result, our design not only has the real-time sampling mode but also can reach the highest equivalent sample rate of 200 MHz using the real-time sample rate of 1 MHz, by way of random equivalent sampling. At the same time, this system has many other functions, such as 2 mV small-signal measuring, storage and re-display of waveform, measuring frequency, selective trigger edge, output of the correction signal and so on.
Platform: | Size: 2180096 | Author: 荣超群 | Hits:

[Software Engineering] stx_cookbook

Description: Altera公司高端FPGA高级综合指导手册，包括：算术运算单元，浮点处理技巧，数据编码格式转换，视频处理，仲裁逻辑，多路选择，存储逻辑，计数器，通信逻辑，循环冗余校验，随机和伪随机函数，加密和同步等编码风格和技巧；-advanced synthesis cookbook for Altera high-end FPGA(Stratix),incuding coding style and design tricks for arithmetic,floating points operation,tranlation and format convertion,vidio, arbitor, multiplexing, registers and memories,communication,CRC,random and pseudorandom functions,cryptography,synchronization,etc.
Platform: | Size: 962560 | Author: 刘易 | Hits:

[VHDL-FPGA-Verilog] 2007

Description: 本数字示波器以单片机和FPGA为核心，对采样方式的选择和等效采样技术的实现进行了重点设计，使作品不仅具有实时采样方式，而且采用随机等效采样技术实现了利用实时采样速率为1MHz的ADC进行最大200MHz的等效采样。-The digital oscilloscope and a single-chip FPGA as the core, the choice of the sampling methods and the equivalent sampling technique designed to achieve a focus, so that not only works with real-time sampling, and the random sampling technique to achieve the equivalent of using real-time sampling rate the ADC for the 1MHz maximum equivalent 200MHz sampling.
Platform: | Size: 14336 | Author: chendan | Hits:

[VHDL-FPGA-Verilog] trunk-hdlc

Description: 高级链路层协议的实现，vhdl，fpga-- 8 bit parallel backend interface - use external RX and TX clocks - Start and end of frame pattern generation - Start and end of frame pattern checking - Idle pattern generation and detection (all ones) - Idle pattern is assumed only after the end of a frame which is signaled by an abort signal - Zero insertion - Abort pattern generation and checking - Address insertion and detection by software - CRC generation and checking (Optional, external, since CRC-16 or CRC-32 can be used) - FIFO buffers and synchronization (External) - Byte aligned data (if data is not aligned to 8-bits extra random bits are inserted) - Q.921, LAPB and LAPD compliant. - For complete specifications refer to spec document
Platform: | Size: 188416 | Author: | Hits:

[VHDL-FPGA-Verilog] rom

Description: 基于Verilog语言编写的各种只读存储器rom和随机存储器ram-Verilog language based on a variety of read-only memory rom and random access memory ram
Platform: | Size: 704512 | Author: 李辽原 | Hits:

[Program doc] RS3123

Description: Reed- So lomon (RS) 码是一种重要的纠错码, 它对随机性和突发性错误有极强的纠错能力, 广泛应用于 数字视频广播(DVB) 系统和其它数字通信领域。给出了一种GF (25) 域上的RS (31, 23) 编码器的实现算法, 介绍 了用现场可编程门阵列(FPGA ) 实现RS 编码器的原理和过程, 并给出了实现电路及其仿真的输出波形。-Reed-So lomon (RS) code is an important error-correcting code, its random and unexpected error has a strong error correction capabilities, widely used in digital video broadcasting (DVB) systems and other digital communications. Gives a GF (25) Domains RS (31, 23) algorithm of the encoder is introduced with a Field Programmable Gate Array (FPGA) RS encoder to achieve the principles and processes, and providing a circuit and simulation of the output waveform.
Platform: | Size: 360448 | Author: 王彬 | Hits:

[VHDL-FPGA-Verilog] Pseudo_Random_Num_Generator

Description: The file included is the source code for Pseudo Random Generator
Platform: | Size: 416768 | Author: Syed Shafi | Hits:

[VHDL-FPGA-Verilog] prbs-FPGA

Description: 。本文 给出了基于线性反馈移位寄存器电路，并结合FPGA 的特有结构，设计了一种简捷而又高效的伪随机序列产生方法。-. In this paper, based on linear feedback shift register circuit, combined with the unique structure of the FPGA, the design of a simple and efficient method for pseudo-random sequence.
Platform: | Size: 63488 | Author: 史培霖 | Hits:

[VHDL-FPGA-Verilog] pseudo-random-sequence-generator-

Description: 利用FPGA编程--- -实现“伪随机序列发生器设计”-FPGA programming------- pseudo-random sequence generator design
Platform: | Size: 317440 | Author: 初昀 | Hits:

[VHDL-FPGA-Verilog] Pseudo-random

Description: 伪随机序列FPGA应用设计代码 Pseudo-random sequence-Pseudo-random sequence of application design
Platform: | Size: 1024 | Author: 林伟 | Hits:

[VHDL-FPGA-Verilog] FPGA--SDRAM

Description: SDRAM:Synchronous Dynamic Random Access Memory- 同步动态随机存储器，同步是指 Memory工作需要同步时钟，内部的命令的发送与数据的传输都以它为基准；动态是指存储阵列需要不断的刷新来保证数据不丢失；随机是指数据不是线性依次存储，而是自由指定地址进行数据读写。
Platform: | Size: 19928064 | Author: 官雄辉 | Hits:

[Other] random-maze

Description: 采用verilg语言并结合VGA显示、PS2接口技术、键盘输入等实现基于FPGA开发板的可选择性迷宫游戏。可以利用电脑键盘和显示器来玩这个游戏-Verilg language and to combine VGA display and the PS2 interface technology, the keyboard input to achieve optional FPGA development board based maze game. Can use the computer keyboard and monitor to play this game
Platform: | Size: 3380224 | Author: 攀龙 | Hits:

[Other] FPGA-RAND

Description: FPGA生成伪随机数,希望对加密的童鞋有用-FPGA generates pseudo-random numbers, we want to be useful
Platform: | Size: 93184 | Author: 张先生 | Hits:

[Program doc] random-number-generator

Description: 基于FPGA 的快速均匀分布随机数发生器 随机数广泛应用于信息论、控制论、排队论、可靠性理论及人工智能等领域, 利用FPGA 的高效性、稳定性来产生均匀随机序列的方法为系统设计或测试带来了极大的便利. 本文在原有算法基础上结合同余法及Lag Fibonaicc 序列的特点, 构建了一个快速高质量的均匀分布随机数发生器. 实验研究证明随机数发生器具有良好的随机特性及均匀性-FPGA-based rapid and uniform distribution of the random number generator
Platform: | Size: 585728 | Author: kevin | Hits:

[Communication-Mobile] random_num_gen

Description: 通过随机数产生原理进行verilog编程，从而实现FPGA的随机数产生(Through random number generation principle for Verilog programming, so as to achieve the FPGA random number generation)
Platform: | Size: 2698240 | Author: 老虎szjwl | Hits:
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